JEDEC has clearly stated that the industry should not expect any DDR5 which means that DDR4 may be the last DDR standard. According with Mike Howard, principal analyst at IHS iSuppli, “DDR4 for servers, laptops and mobile devices will be around for a long time as no successor is under development”, saying that "It will be the last DDR iteration". It is probable that next high speed DRAM communication will use the 3D stacking approach. In this article four emerging technologies, all based on 3D stacking approach, namely: HMC, HBM, Wide I/O 2 and DDR4-3S has been discussed. This blog has been built by using information from various articles that you can find on Cadence webpage.
Standard cell, memory, and I/O library characterization is a necessary, but time-consuming, resource intensive, and error-prone process. With the added complexity of advanced and low power manufacturing processes, fast and accurate statistical and non-statistical characterization is challenging, creating the need for a new class of tools to address these challenges.
The Internet of Things (IoT) as a concept is fascinating and exciting, but one of the major challenging aspects of IoT is having a secure ecosystem encompassing all building blocks of IoT-architecture. Understanding the different building blocks of IoT, identifying the areas of vulnerability in each block and exploring technologies needed to counter each of the weaknesses are essential in dealing with the security issue of IoT.